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BugID: #05409

カテゴリ 重要度 ステータス 解決状況 登録日時 最終更新
システムコア認証済み未処理2014-01-02 11:132016-12-26 09:29
 
テスターjwdonal担当者 ソース
バージョン0.152発生バージョン修正バージョン
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概 要SPC-700がTCLR1/TSET1命令に対するプロセッサステータスフラグを正しく設定しない。
詳 細From Anomie's spc700.txt we have:

TCLR1 !a 4E 3 6 (a) = (a)&~A, ZN as for A-(a) N.....Z.
TSET1 !a 0E 3 6 (a) = (a)|A, ZN as for A-(a) N.....Z.

It is quite clear from looking at macros OP_TCLR1 and OP_TSET1 in "mess_src_152b\src\emu\cpu\spc700\spc700.c" that the NZ flags are not being set according to A-(a) as Anomie's document states. To fix the problem I just changed the macros as follows:

/* Test and Clear Bits */
#define OP_TCLR1(BCLK, MODE) \
CLK(BCLK); \
DST = EA_##MODE(cpustate); \
FLAG_NZ = read_8_##MODE(DST); \
cpustate->spc_int16 = (short)REG_A - (short)(read_8_##MODE(DST)); \
write_8_##MODE(DST, FLAG_NZ & ~REG_A); \
FLAG_NZ = MAKE_UINT_8(cpustate->spc_int16);

/* Test and Set Bits */
#define OP_TSET1(BCLK, MODE) \
CLK(BCLK); \
DST = EA_##MODE(cpustate); \
FLAG_NZ = read_8_##MODE(DST); \
cpustate->spc_int16 = (short)REG_A - (short)(read_8_##MODE(DST)); \
write_8_##MODE(DST, FLAG_NZ | REG_A); \
FLAG_NZ = MAKE_UINT_8(cpustate->spc_int16);

However, I have not rigorously tested these changes, nor am I very familiar with exactly how the mess source works...so you might want to come up with your own solution.
再現手順A very simple example of the NZ flags not being set correctly would be to run the following instructions on the spc-700.

mov $00, #$55
mov A, #$55
tclr1 $0000

From the above, since direct-page location $00 holds the value $55 and since the accumulator A holds the value $55, the Z flag should be set to 1 based on the algorithm A-(a)...but this does not happen.
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